Two workshops are available towards the end of ITC test week.

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Fifth IEEE International Workshop on Silicon Lifecycle Management (Including ARTS “ Automotive Reliability, Test & Safety):  http://slm.tttc-events.org/

With increasing system complexity, security, stringent runtime requirements for functional safety, and cost constraints of a mass market, the reliable and secure operation of electronics in safetycritical, enterprise servers and cloud computing domains is still a major challenge.

While traditionally design time and test time solutions were supposed to guarantee the in-field dependability and security of electronic systems, due to the complex interaction of runtime effects from running workload and environment, there is a great need for a holistic approach for silicon lifecycle management, spanning from design time to in-field monitoring and adaptation. Therefore, the solutions for lifecycle management should include various sensors and monitors embedded in different levels of the design stack, access mechanisms and standards for such on-chip and in-system sensor network, as well as data analytics on the edge and in the cloud.
The SLM Workshop offers a forum to present and discuss these challenges and emerging solutions among researchers and practitioners alike. SLM will take place in conjunction with the IEEE International Test Conference (ITC 25); is sponsored by IEEE Philadelphia Chapter; and conceived by the IEEE Test Technology Technical Council (TTTC).
SLM will include ARTS, the Automotive Reliability, Test & Safety Workshop this year

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3D & Chiplet TEST Workshop (tttc-vts.org)

The 3D & Chiplet TEST Workshop focuses exclusively on test and repair of chiplet-based stacked ICs, including 2.5D and 3D-Stacks based on hybrid bonding, through-silicon vias (TSVs), micro-bumps, and/or interposers.

While these multi-die packages offer many attractive advantages, such as heterogeneous integration, small form-factor, high bandwidth and performance, and low power dissipation, there are many challenges with respect to testing, monitoring and repairing such chiplet-based systems. The 3D & Chiplet TEST Workshop offers an ideal forum to present and discuss these challenges and emerging solutions among researchers and practitioners alike.

The 9th edition of 3D & Chiplet TEST will take place in conjunction with the IEEE International Test Conference (ITC) and is sponsored by the IEEE Philadelphia Section in concurrence with the Test Technology Technical Council (TTTC) of IEEE Computer Society