Wednesday, November 1, 8:30 am – 10:00 am

Session 4: Dealing with Jitter and Leveraging Light – Room 201 A/B

Chair: 

Bob Bartlet (Advantest Corporation, USA)
Discussant:
Sule Ozev (Arizona State University, USA)
4.1: Nonintrusive Detection of Defects in Mixed-Signal Integrated Circuits Using Light Activation
Vahap Baris Esen, Anthony Coyette, Nektar Xama (KU Leuven, Belgium)
Wim Dobbelaere, Ronny Vanhooren (ON Semiconductor, Belgium)
Georges Gielen (KU Leuven, Belgium)
4.2: Accurate ADC Testing with Significantly Relaxed Instrumentation Including Large Cumulative Jitter
Li Xu (Texas Instrumentation, USA)
Degang Chen, Yuming Zhuang (Iowa State University, USA)
Kenneth Butler (Texas Instruments, USA)
Rajavelu Thinakaran (Texas Instruments, India)
4.3: A Jitter Separation and BER Estimation Method for Asymmetric Total Jitter Distributions
Masahiro Ishida, Kiyotaka Ichiyama (ADVANTEST Corporation, Japan)

Session 5: Cell and Bridging ATPG – Room 202 C/D

Chair:

Andreas Glowatz (Mentor Graphics, Germany)

Discussant:

Vivek Chickermane (Cadence Design Sstems, USA)
5.1: DFM-aware Fault Model and ATPG for Intra-Cell and Inter-Cell Defects
Arani Sinha (Intel, USA)
Sujay Pandey (Georgia Institute of Technology, USA)
Ayush Singhal, Alodeep Sanyal, Alan Schmaltz (Intel, USA)
5.2: Layout-aware 2-Step Window-based Pattern Reordering for Fast Bridge/Open Test Generation
Masayuki Arai (Nihon University, Japan)
Shingo Inuyama, Kazuhiko Iwasaki (Tokyo Metropolitan University, Japan)
5.3: Selecting Target Bridging Faults for Uniform Circuit Coverage
Irith Pomeranz (Purdue University, USA)

Session 6: Security – Room 202 A/B

Chair:

Jennifer Dworak (Southern Methodist University, USA)
6.1: Hardware Trojan Detection Through Information Flow Security Verification
Adib Nahiyan, Mehdi SadiRahul Vittal, Gustavo Contreras, Domenic Forte, Mark Tehranipoor (University of Florida, USA)
6.2: Run-Time Hardware Trojan Detection Using Performance Counters
Rana Elnaggar, Krishnendu Chakrabarty (Duke University, USA)
Mehdi Tahoori (Karlsruhe Institute of Technology, Germany)
6.3: Thwarting Analog IC Piracy via Combinational Locking
Jiafan Wang, Congyin Shi, Adriana Sanabria-Borbon, Edgar Sanchez-Sinencio, Jiang Hu (Texas A & M University ECE Department, USA)

Session 7: Memory and 3D Test – Room 201 C

Chair:
Anne Gattiker (IBM, USA)
Discussant:
Rob Aitken (ARM Ltd., USA)
7.1: Cross-Layer Refresh Mitigation for Efficient and Reliable DRAM Systems: A Comparative Study
Xiaoan Ding, Xi Liang, Yanjing Li (University of Chicago, USA)
7.2: Improvement of the Tolerated Raw Bit-Error Rate in NAND Flash-based SSDs with the Help of Embedded Statistics
Valentin Gherman,  Emna Farjallah, Jean-Marc Armani, Marcelino Seif (CEA, France)
Luigi Dilillo (LIRMM, France)
7.3: Analytical Test of 3D Integrated Circuits
Raphael RobertazziMicheal Scheurman, Matt Wordeman, Shurong Tian, Christy Tyberg (IBM Research, USA)