2020 Tutorials

TTTC tutorial URL – http://ttep.tttc-events.org/ttep/tutorials.html

Sunday, November 1
morning afternoon
1 TEST CHALLENGES AND SOLUTIONS FOR NON-VOLATILE MEMORY DESIGN Swaroop Ghosh 4 MACHINE LEARNING IN DATA ANALYTICS Li-C. Wang, Chuanhe (Jay) Shan
2 DEFECT BASED TESTING: SELECTING RIGHT FAULT MODELS, CREATING NEW ONES Rubin Parekhji, Wilson Pradeep 5 MIXED-SIGNAL DFT & BIST: TRENDS, PRINCIPLES, AND SOLUTIONS Stephen Sunter
3 AI CHIP TECHNOLOGIES AND DFT METHODOLOGIES Lee Harrison 6 TESTING OF TSV-BASED 2.5D- AND 3D-STACKED ICS Erik Jan Marinissen
Monday, November 2
morning afternoon 
7 ADVANCES IN FINFET MEMORY TEST & REPAIR FOR COMPLEX SOCs Yervant Zorian 10 AUTOMOTIVE SAFETY, RELIABILITY, & TEST SOLUTIONS Riccardo Mariani, Yervant Zorian
8 APPLICATIONS OF MACHINE LEARNING IN SEMICONDUCTOR MANUFACTURING AND TEST Haralampos Stratigopoulos, Yiorgos Makris 11 ADVANCES IN DEFECT-ORIENTED TESTING Adit Singh, Andreas Glowatz
9 IMPROVING ATPG TEST QUALITY OF DIGITAL ICS Erik Jan Marinissen, Adit Singh 12 FROM TEST TO POST-SILICON VALIDATION: CONCEPTS AND RECENT TRENDS Arani Sinha, Sandip Ray

 

2020 Workshops

IEEE 3D & Chiplet Test Workshop

3DC Workshop webpage

The 3DC-TEST Workshop focuses exclusively on test of and design-for-test for three-dimensional, chiplet-based, and stacked ICs (3D-SICs), including systems-in-package (SiP), package-on-package (PoP), 3D-SICs based on through-silicon vias (TSVs), micro-bumps, and/or interposers. While these stacked ICs offer many attractive advantages with respect to heterogeneous integration, small form-factor, high bandwidth and performance, and low power dissipation, there are many open issues with respect to testing such products. The 3DC-TEST Workshop offers a forum to present and discuss these challenges and (emerging) solutions among researchers and practitioners alike. 3DC-TEST will take place in conjunction with the IEEE International Test Conference (ITC) 2020.

IEEE Automotive Test and Reliability Workshop

ART Workshop webpage

The ART workshop focuses exclusively on test and reliability of automotive and mission-critical electronics, including design, manufacturing, burn-in, system-level integration and in-field test, diagnosis and repair solutions, as well as architectures and methods for reliable and safe operations under different environmental conditions. With increasing system complexity, security, stringent runtime requirements for functional safety, and cost constraints of a mass market, the reliable operation of electronics in safety-critical domains is still a major challenge. This edition of the ART Workshop offers a forum to present and discuss these challenges and emerging solutions among researchers and practitioners alike.