Best Papers

Best Paper Awards

2015 Best "A Structured Approach to Post Silicon Validation and Debug using Symbolic Quick Error Detect," David Lin, Eshan Singh, Clark Barrett and Subhasish Mitra
2014 Best "Yield Optimization Using Advanced Statistical Correlation Methods," Jeffrey Tikkanen, Sebastian Siatkowski, Nik Sumikawa, Li-C Wang and Magdy Abadir
2013 Best "Test Time Reduction with SATOM: Simultaneous AC-DC Test with Orthogonal Multi-excitations," D. Chen, Z. Yu, Iowa State University;K. Maniar, M. Nowrozi, Texas Instruments
2012 Best "Algorithm for Dramatically Improved Efficiency in ADC Linearity Test," Z. Yu and D. Chen, Iowa State University
2011 Best "Real-Time Testing Method for 16 Gbps 4-PAM Signal Interface," M. Ishida, K. Ichiyama, D. Watanabe, M. Kawabata, T. Okayasu,Advantest
2010 Best "Lessons from At-Speed Scan Deployment on an Intel Itanium Microprocessor,"  P. Pant, J. Zelman, G. Colon-Bonet, J. Flint, S. Yurash, Intel
  Honorable "Adaptive Test Flow for Mixed-Signal RF Circuits Using Learned Information from Device Under Test,"E. Yilmaz, S. Ozev, Arizona State University, K. Butler, Texas Instruments
2009 Best "Voltage Transient Detection and Induction for Debug and Test," R. Petersen, P. Pant, P. Lopez, A. Barton, J. Ignowski, D. Josephson, Intel
  Honorable "A Robust Method for Identifying a Deterministic Jitter Model in a Total Jitter Distribution," T. Yamaguchi, K. Ichiyama, M. Ishida, H. Hou, Advantest
2008 Best "Test Access Mechanism for Multiple Identical Cores," G. Giles, J. Wang, A. Seghal, L.J. Balakrishnan, J. Wingfield,Advanced Micro Devices
  Honorable "A Method to Generate a Very-Low-Distortion, High-Frequency Sine Waveform Using an AWG," A. Maeda, Verigy Japan
  Honorable "Efficiently Performing Yield Enhancements by Identifying Dominant Physical Root Cause from Test Fail Data," M. Sharma, R. Benware, L. Ling, D. Abercrombie, L. Lee, M. Keim, H. Tang, W-T. Cheng, T-P. Tai, Mentor Graphics,; Y-J. Chang, R. Lin, UMC; A. Man, Advanced Micro Devices
2007 Best "On-Chip Timing Uncertainty Measurements on IBM Processors," R. Franch, P. Restle, N. James, W. Huott, J. Friedrich, R. Dixon, S. Weitzel, K. Van Goor, G. Salem,IBM
2006 Best "Signature Based Diagnosis for Logic BIST"  M. Sharma, W. Cheng, T. Rinderknecht, L. Lai and C. Hill, Mentor Graphics
2005 Best "Structural Tests for Jitter Tolerance in SerDes Receivers"  Steve Sunter, Aubin Roy, LogicVision
2004 Best "A New Probing Technique for High-Speed/High-Density Printed Circuit Boards" K. Parker, Agilent Technologies
  Honorable "In Search of the Optimum Test Set-Adaptive Test Methods for Maximum Defect Coverage and Lowest Test Cost" R. Madge, B. Benware, R. Turakhia, LSI Logic and R. Daasch, C. Schuermyer, J. Ruffler, Portland State University
    "Random and Systematic Defect Analysis Using IDDQ Signature Analysis for Understanding Fails and Guiding Test Decisions" P. Nigh, A. Gattiker, IBM
2003 Best "Elimination of Traditional Functional Testing of Interface Timings at Intel" Mike Tripp, T.M. Mak and Anne Meixner; Intel Corporation
  Honorable "Convolutional Compaction of Test Responses" Janusz Rajski and Chen Wang; Mentor Graphics, Jerzy Tyszer; Poznan University of Technology, and Sudhakar M. Reddy; University of Iowa
2002 Best "Architecting Millisecond Test Solutions for Wireless Phone RFICs" John Ferrario, Steve Moss, Randy Wolf; IBM Microelectronics
  Honorable "Complete, Contactless I/O Testing – Reaching the Boundary in Minimizing Digital IC Testing Cost"  Stephen Sunter and Benoit Nadeau-Dostie; LogicVision
2001 Best "Neighbor Selection for Variance Reduction in IDDQ and Other Parametric Data"  R. Daasch, K. Cota and J. McNames, Portland State University; R. Madge, LSI Logic
  Honorable "Debug Methodology for the McKinley Processor"  D. Josephson and V. Govan, Hewlett-Packard; S. Poehlman, Intel
2000 Best "A Stand-alone Integrated Test Core for Time and Frequency Domain Measurements"   Gordon Roberts, Mohamed Hafed and Nazmy Abasharoun, McGill University
  Honorable "Logic Mapping on a Microprocessor"  Hari Balachandran, Regy Thomas, John Carulli and Anjali Kinra, Texas Instruments
1999 Best "Current Ratios: A Self-Scaling Technique for Production IDDQ Testing"  Peter Maxwell, Pete O’Neill, Rob Aitken, Roland Dudley, Neal Jaarsma, Minh Quach, Don Wiseman; Hewlett-Packard
  Honorable "Logic BIST for Large Industrial Designs: Real Issues and Case Studies"  Graham Hetherington, Tony Fryars; Texas Instruments; Nagesh Tamarapalli, Mark Kassab, Abu Hassan and Janusz Rajski, Mentor Graphics.
    "BIST for Phase-Locked Loops in Digital Applications"  Stephen Sunter and Aubin Roy, LogicVision.
    "The Attack of the ‘Holey Shmoos’: A Case Study of Advanced DFD and Picosecond Imaging Circuit Analysis (PICA)"  William Huott, Moyra McManus, Daniel Knebel, Steven Steen, Dennis Manzer, Pia Sanda, Steven Wilson, Yuen Chan, Antonio Pelella and Stanislav Polonsky, IBM.
1998 Best "Failure Analysis of Timing and IDDQ-only Failures from the SEMATECH Test Methods Experiment"  Phil Nigh, Dave Vallett, Atul Patel, Jason Wright, IBM Microelectronics; Franco Motika, Donato Forlenza, Ray Kurtulik, Wendy Chong, Micrus Corporation
  Honorable "Defect Detection with Transient Current Testing and its Potential for Deep Sub-micron CMOS ICs"  Manoj Sachdev, Peter Janssen, Victor Zieren, Philips Research Laboratories
    "Probabilistic Mixed-Model Fault Diagnosis" David Lavo, Brian Chess, Tracy Larrabee, UC, Santa Cruz; Ismed Hartanto, Hewlett Packard Company
1997 Best "Current Signatures: Application" Anne Gattiker, Wojciech Maly, Carnegie Mellon Univ.
  Honorable "Intrinsic Leakage in Low-Power Deep-Submicron CMOS ICs"  Ali Keshvaritz, Intel Corp.; Kaushik Roy, Purdue Univ.; Charles Hawkins, Univ. of New Mexico
1996 Best "Weak-Write Test Mode: an SRAM Cell Stability Design for Test Technique"  Ann Meixner, Jash Banik, Intel Corp.
  Honorable "Early Capture for Boundary Scan Timing Measurments"  Keigh Loftstrom, KLIC Corp.
    "Process-Aggravated Noise: New Validation and Test Problem"  Melvin Breuer, Sandeep Gupta, Univ. of Southern California
1995 Best "Improved Boundary Scan Design"  Lee Whetsel, Texas Instruments, Inc.
  Honorable "Improving DSP-Based Measurements with Spectral Interpolation"  Mark Burns, Texas Instruments, Inc.
1994 Best "Defect Classes – An Overdue Paradigm for CMOS IC Testing"  Charles F. Hawkins, Univ. of New Mexico; Jerry M. Soden and Alan W. Righter, Sandia National Labs; F. Joel Ferguson, Univ. of California, Santa Cruz
  Honorable "An Analog Multi-Tone Signal Generator for Built-In Self Test"  A.K. Lu, G.W. Roberts, McGill University
1993 Best "Structure and Metrology for an Analog Testability Bus"  Kenneth P. Parker, John E. McDermid and Stig Oresjo, Hewlett-Packard Company
  Honorable "A BIST Scheme for an SNR Test of a Sigma-Delta ADC"  M.F. Toner and G.W. Roberts, McGill University
1992 Best "A Comparison of Defect Models for Fault Location with IDDQ Measurements"  Robert C. Aitken, Hewlett-Packard Company
  Honorable "High-Performance Pin Electronics with GaAs, A Contradiction in Terms?"  Ulrich Schoettmer and Holger Engelhard, Hewlett-Packard Company
    "A Proposed Method of Accessing 1149.1 in a Backplane Environment"  Lee Whetsel, Texas Instruments, Inc.
1991 Best "Implementing 1149.1 on CMOS Microprocessors"  William C. Bruce, Michael G. Gallup, Grady Giles and Tom Munns, Microprocessor and Memory Technology Group, Motorola, Inc.
  Honorable "The Effect of Different Test Sets on Quality Level Prediction: When is 80% Better Than 90%?"  Peter C. Maxwell, Robert C. Aitken, Vic Johansen and Inshen Chiang, Hewlett-Packard Company
1990 Best "CMOS Bridge Fault Detection"  Thomas M. Storey and Wojciech Maly, Carnegie Mellon University
  Honorable "Frequency Enhancement of Digital Test Systems"  Leslie Ackner and Mark R. Barber, AT&T Bell Laboratories
    "Increased CMOS Stuck-at Fault Coverage with Reduced IDDQ Test Sets"  Ronald R. Fritzmeier, Jerry M. Soden and R. Keith Treece, Sandia National Laboratories, and Charles F. Hawkins, University of New Mexico
1989 Best "Built-in Self-Test of the Macrolan Chip"  Richard Illman and Steve Clarke, ICL Mainframe Systems Division
  Honorable "A High-Performance, 10-Volt Integrated Pin Electronics Driver"  Chris Branson, Tektronix, Inc.
    "A 250-MHz Shared-Resource VLSI Test System with High Pin-Count and Memory Test Capability"  Shuji Kikuchi, Yoshihiko Hayashi, Takashi Matsumoto, Ryozou Yoshino and Ryuichi Takagi, Hitachi, Ltd.
1988 Best "Membrane Probe Card Technology – The Future for High-Performance Wafer Test"  Brian Leslie, Tencor Instruments, and Farid Matta, Hewlett-Packard Company
  Honorable "Test Head Design Using Electro-Optic Receivers and GaAs Pin Electronics for a Gigahertz Production Test System"  Francois J. Henley and Hee-June Choi, Photon Dynamics, Inc.
    "Statistical Delay Fault Coverage and Defect Level for Delay Faults"  E.S. Park and M. Ray Mercer, University of Texas at Austin, and Thomas W. Williams, IBM Corp.
1987 Best "Hierarchical Test Generation: Can AI Help?"  Balaji Krishnamurthy, Tektronix Labs
  Honorable "A Generic Procedure for Evaluating VLSI Test System Timing Accuracy " Marc Mydill, Texas Instruments, Inc.
1986 Best "Comparison of Aliasing Errors for Primitive and Non-Primitive Polynomials"   T.W. Williams and C.W. Starke, IBM Corp., and W. Daehn and M. Gruetzner, University of Hannover
  Honorable "Reliability and IC Electrical Properties of Gate Oxide Shorts"  Charles Hawkins, University of New Mexico, and Jerry Soden, Sandia National Laboratories
    "ISDN Device Testing Demands A New Level of Performance from Automatic Test Equipment "  R. Kramer, Teradyne, Inc.
1985 Best "The Electrical Behavior of Gate-Oxide Short Defects"  Charles Hawkins, University of New Mexico, and Jerry Soden, Sandia National Laboratories
1984 Best "Random Testing for Stuck-at-Storage Cells in an Embedded Memory"  William H. McAnney, Paul H. Bardell and Ved P. Gupta, IBM, Corp.
1983 Best "Subnanosecond Timing Measurements on MOS Devices Using Modern VLSI Test Systems"  Mark Barber, AT&T Bell Laboratories
  Honorable "HITEST – Intelligent Test Generation" Gordon D. Robinson, Cirrus Computers, Ltd.
  Honorable "New Techniques for High-Speed Analog Testing"  Matthew V. Mahoney, LTX Corp
1982 Best "Testability Measures – What do they tell us?"  Vishwani Agrawal and M. Ray Mercer, AT&T Bell Laboratories
1981 Best "Automated Measurement of 12- to 16-bit Converters"  Matthew Mahoney, LTX, Corp.
1980 Best "Soft Error Testing,"  Tim May D.L. Crook, D.W. Gralian, R.A. Reininger, R.C. Smith, Intel Corp.
  Honorable "A New Approach to High-Speed Codec Testing"  Matthew Mahoney, LTX Corp.
    "Testing for Bipolar Integrated Circuit Failures" Jayne Partridge, Charles Stark Draper Lab, Inc.
    "Electron Beam Testing of Microprocessors"  G. Crichton, P. Fazekas and E. Wolfgang, Siemens AG (Germany)
1979 Best "Design for Self-Verification: An Approach for Dealing with Testability Problems in VLSI-Based Designs"  Richard Sedmak, Sperry Univac