Ballroom A/B

Wednesday, November 1, 4:30 pm – 5:30 pm

Session K2: Security Keynote:

Ultra-low Energy Security Circuit Primitives for IoT Platforms,

Sanu Mathew, Intel

Low-area energy-efficient security primitives are key building blocks for enabling end-to-end content protection, user authentication and data security in IoT platforms. This talk describes the design of security circuit primitives that employ energy-efficient circuit techniques with optimal hardware-friendly arithmetic for seamless integration into area/battery constrained IoT systems: 1) A 2040-gate AES accelerator achieving 289Gbps/W efficiency in 22nm CMOS, 2) Hardened hybrid Physically Unclonable Function (PUF) circuit to generate a 100% stable encryption key. 3) All-digital TRNG to achieve >0.99 min-entropy with 3pJ/bit energy-efficiency. The talk will also discuss design issues related to side-channel leakage of key information, and how they may be addressed during design of encryption circuits. Finally, the talk will touch upon existing challenges of maintaining the integrity of security circuits, while still enabling testability and post-silicon validation.

 

Bio:

Sanu Mathew is a Senior Principal Engineer with the Circuits Research Labs at Intel Corporation, Hillsboro, Oregon, where he leads research & development of energy-efficient hardware accelerators for encryption & security. Sanu obtained his Ph.D. degree in Electrical and Computer Engineering from State University of New York at Buffalo in 1999. He holds 41 issued patents, with another 63 patents pending and has published over 77 conference/journal papers. He has been with Intel for the past 18 years.