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The Synopsys synthesis-based test solution comprises DFTMAX Ultra, DFTMAX, TetraMAX and TetraMAX II technologies for power-aware logic test and physical diagnostics; DFTMAX LogicBIST for in-system self-test; SpyGlass® DFT ADV for testability analysis; the DesignWare® STAR Hierarchical System for automated hierarchical test; the DesignWare STAR Memory System® for embedded test, repair and diagnostics; the Z01X™ fault simulator; and Yield Explorer design-centric yield analysis. Synopsys' test solution combines Design Compiler® RTL synthesis with embedded test technology to optimize timing, power, area and congestion for test as well as functional logic, leading to faster time-to-results. The Synopsys test solution delivers tight integration across the Synopsys Design Platform, including Design Compiler synthesis, IC Compiler™ II place and route, and PrimeTime timing analysis, to enable faster turnaround time while meeting both design and test goals, higher defect coverage and faster yield ramp.
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